The largest manufacturer of contract chips in the world – Taiwan Semiconductor Manufacturing Co – is reportedly preparing to unveil technology for 3D integrated circuit packaging as well as testing in 2015. This was reported in a latest report from a market research group on December 31. The Market Intelligence & Consulting Institute (MIC), which comes under the purview of the state-sponsored Institute for Information Industry, stated that the technology has been at the development phase for several years. Now that the company’s team is in the final phases of testing the possibilities of this technology, TSMC is likely slated to launch the 3D integrated fan out in 2015.
The integrated fan out is a packaging technology that works at the wafer-level. It allows for denser packaging of semiconductor chips, and to provide an increased number of input/output connections over currently prevailing packaging methods. The technology is expected to prove highly beneficial to the latest trend of low-cost chipsets that are also more compact in size.
The MIC expects that with the introduction of the InFO technology, TMSC will be able to slash operating costs. To do this, it will replace its existing 2.5D IC technology that is being used for packaging and testing. With the growing adoption on Internet of Things, and the massive market for wearable devices, this new technology will help TMSC responsively meet expanding demand from chip suppliers globally. The Internet of Things is a rapidly developing concept that enables interconnectivity between day-to-day devices right from smartphones to vacuum cleaners to security systems. According to industry analysts, these efforts by TSMC will further intensify competition in the semiconductor industry.